Intel, IBM Show Advanced Chip-Making Technologies

Inte Corp. and IBM Corp. have separately announced significant chip-making advancements. Intel on Monday revealed that its researchers have developed working transistors with architectures as small as 0.03-microns, nearly as small as human DNA, while IBM on Sunday said it has begun pilot production of chips utilizing a new process technology package that combines several recent advances in chip-making.

The new Intel technology, announced at the International Electronic Device Manufacturers show in San Francisco, will enable the Santa Clara, Calif.-based chip maker to develop a 0.07-micron architecture chip by 2005. It will have 400 million transistors, operate at 10GHz and require less than one volt of power, according to Intel spokesperson Manny Vara. Intel claims it still has found no fundamental barrier to extending Moore's law of ever-increasing processor clock speeds.

Current Intel chips, including the Pentium 4 and upcoming 64-bit Itanium processors, are produced with 0.18-micron technology. Intel plans reductions to 0.13-microns by the end of next year, when the company will also change over from aluminum transistor relays to copper for all its chips, Vara said.

From there, Intel will move to 0.10-microns, with the target 0.07-micron chip slated for 2005. A 0.05-micron chip will follow, as Intel's goal is to shrink the size of its processor transistors by 30 percent every two years, said Vara, who added that the size of the relays used in the accompanying chip sets will also "ramp just as quickly."

Applications for a 10GHz chip include the ability for real-time computation of speech, as well as 3-dimensional HDTV quality graphics, said Vara.

Meanwhile, IBM said that the first commercial products resulting from its new process technology package are scheduled to ship early next year.

Combining several recent IBM advances in chip-making technology, the new process technology package called CMOS (complementary metal-oxide semiconductor) 9S, will allow for more powerful chips for use in a broad range of devices. They will be able to support new performance-hungry applications, including speech recognition, fingerprint authentication and wireless video, IBM said in a statement.

The new chips will appear in servers, communications equipment and pervasive computing products, including mobile phones. The new process technology will also be used to produce future versions of IBM's Power4 processor, which will ship in a new eServer model code named Regatta, scheduled for launch next year, IBM said.

By allowing for more powerful chips, the process technology will be key to the development of processors that will support performance-hungry applications, including speech recognition, fingerprint authentication and wireless videoWith CMOS 9S, IBM has combined copper wiring, silicon-on-insulator (SOI) transistors and an improved insulation technology dubbed low-k dielectric, to build chips according to design rules as small as 0.13 micron.

IBM claimed that CMOS 9S is the only 0.13-micron process technology to take advantage of SOI, which it said can improve transistor performance by up to 35 percent by providing an insulating layer in the silicon base of a chip to improve the flow of electrical current to the chip's circuitry.

David Legard is a Singapore correspondent for the IDG News Service, an InfoWorld affiliate. Dan Neel is an InfoWorld senior writer.

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