AMD Tweaks Intel with PR Coup

Claiming it had showed off a dual-core x86 90nm Opteron at its facilities in Austin, Texas, on Tuesday, AMD tried to steal the thunder of Intel, which claims to have laid the multi-threaded foundation needed for operating systems and applications to make the leap to multi-core with its HyperThreading widgetry and has been saying it will trot out a dual-core Xeon at the upcoming Intel Developer Forum.

In a move as predictable as the sun rising in the east, AMD drew a PR bead on Intel last week and managed to get a small bottle of ink spilled over how it had showed off a dual-core x86 90nm Opteron at its facilities in Austin, Texas on Tuesday.

This is the usual kind of one-upmanship that AMD tries to score in the run-up to any Intel Developer Forum and Intel is hosting one next week, but AMD's really stretching when it claims that its little coup changes the dynamics of the chip business.

Gee whiz, guys, multi-core chips are about to become as common as dirt, the universal design practiced by Intel, IBM and Sun as well as AMD because frequency has hit the wall.

IBM and Sun already produced dual-core chips. Intel claims to have laid the multi-threaded foundation needed for operating systems and applications to make the leap to multi-core with its HyperThreading widgetry and Intel could trot out a dual-core Xeon at IDF, but sniffs that it's not into "static demos given to who knows who." Evidently it's going to show off a dual-core Itanium doing something to an audience of 5,000.

Anyway, AMD, which reportedly got its dual-core silicon two weeks ago, says it showed the thing in an HP ProLiant server that was fitted out with four of the chips.

HP of course is the company that has bet its future on Intel's 64-bit Itanium and now finds it has to cover a position in AMD's gentler 64-bit solution just in case.

The fact that the demo used an HP prototype is supposed to betoken the "close relationship and collaboration" between HP and AMD, according to Paul Miller, VP of marketing for HP's industry standard server unit.

The dual-core chip won't be built into commercial workstations and up-to-eight-socket servers until the middle of next year. Dual-core chips for clients are expected to follow in the second half of next year. Intel is supposed to have its Xeon and Itanium dual-cores out next year too. Who beats who remains to be seen, if it matters.

The multi-core technique is generally recognized as producing more efficient processing without the penalties of increased power consumption and heat dissipation.

AMD says it expects its widget to offer the best performance per watt on the market, an assertion it may find conflicts with the claims Sun, an Opteron OEM, is expected to make about its own upcoming Niagara chip.

Niagara boxes aren't supposed to hit market until early '06 so Sun said appreciative things about AMD's Opterons in the meanwhile.

AMD says its design, which it calls an extension of its AMD64 Direct Connect Architect, puts two cores on the same die along with the memory controller, I/O and other processors. The company provided no concrete performance data other than the fact that it's using a 90nm SOI process.

Intel, which is deeper into its 90nm transition than AMD though it's had some problems making the shift that AMD may not have, is already pushing into 65nm manufacturing and Monday announced that its technique looked solid since it had managed to produce fully functioning 70-megabit SRAMs with more than half-a-billion transistors.

The event gave Intel the opportunity to rejoice in the continued validity of Moore's Law and remind everybody that what Moore etched on his tablets was that transistors double every couple of years, not frequency.

Meanwhile, AMD and Infineon Technologies plan to put US$204 million over the next five years in a nanotechnology research center they're supposed to set up at AMD's fab in Dresden, Germany. They will work with Fraunhofer Gesellschaft researchers.

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