Intel, Micron announce denser, multi-bit SSD tech

Intel Corp. and Micron Technology Inc. announced today that they have developed a new 3-bit-per-cell, NAND flash memory technology using Micron's 34-nanometer lithography process.

"Fundamentally, this will reduce the overall cost of our MLC flash product," said Kevin Kilbuck, director of NAND marketing at Micron.

Multi-level cell (MLC) NAND flash chips, which are typically used in consumer storage devices such as flash cards and USB flash drives, store 2-bits per cell today. The new chip represents an 11% reduction in flash chip size, from 141 to 126 square millimeters in size, Kilbuck said.

The new memory is being manufactured by IM Flash Technologies LLC, a joint venture of Micron and Intel. The 3-bit-per-cell NAND technology is the industry's smallest and most cost-effective 32-gigabit chip currently available on the market, the companies said.

Micron is currently sampling the flash memory and it will be in mass production in the fourth quarter 2009, Kilbuck said.

"Three-bit allows these guys to aim at the heart of the market with a chip that has a lower cost structure, so when other NAND makers are losing money Intel and Micron could be profiting," said Jim Handy, an analyst at Objective Analysis in Los Gatos, Calif.

Intel's and Micron's new 3-bit flash memory is not a first. In January, Toshiba announced a 3-bit 43-nanometer chip in and projected that they would be shipping a 32-nanometer version of the flash chip in the third quarter. However, in SanDisk's most recent earnings call, the company projected shipments of Toshiba's 3-bit chips in its flash products by the end of the year, "so [Toshiba's] schedule may have slipped a quarter," Handy said. "The two companies have the capability of ramping the same chip at the same time," he said.

"Now we must watch to see how Samsung and Hynix respond," Handy said. "These two companies, and Hynix' partner Numonyx, stand to undergo a lot of price pressure from competitors."

Last November, Micron announced a 32Gbit, 2-bit-per-cell MLC NAND flash chip that is currently being used in its consumer solid-state disk (SSD) drives.

Micron and Intel's 3-bit-per-cell NAND is also a 32Gbit chip, but Intel does not plan on using the technology to develop a SSD drive in the near future.

Instead, Micron plans to use the denser MLC memory for USB memory sticks by the end of the year and expects it to contribute to a price drop "in the high single digits," Kilbuck said.

"Theoretically, you could take [NAND flash chips] and get a third more capacity for a 48Gbit chip, but there are a couple reasons we didn't do that," Kilbuck said. "The alternate path is instead of increasing density you can reduce the die size and have a smaller 32Gbit [chip] than your 2-bit-per-cell chip. That's the path we took."

Kilbuck went on to say that 48Gbit is a non-binary density, and it would lead to oddball capacities, compared with today's 2GB, 4GB, and 128GB flash memory devices.

Troy Winslow, director of NAND marketing at Intel, acknowledged that just as 2-bit-per-cell NAND flash memory natively doesn't last as long as single-level cell (SLC), or 1-bit-per-cell NAND, the new 3-bit-per-cell technology can sustain even fewer write cycles than 2-bit-per-cell MLC NAND.

Therefore, the companies are also awaiting upgrades to controller firmware that will help improve write endurance or drive longevity for SSDs using the new flash memory.

"As you continue to add extra bits to the cell, the challenges for the firmware in the controller do increase. That's why neither Micron nor Intel are saying we're going to be putting this version of the flash memory into an SSD or a computing solution," Winslow said. "We're using this as a proof-point of our silicon manufacturing leadership."

Winslow said the 3-bit-per-cell memory "sets the stage" as the company moves toward sub-30 nanometer lithography technology.

"Then we're going to take the full advantage of having SLC, MLC and 3-bit-per-cell ... and put them into all of our solutions and not just the USB drives that is currently targeted for this generation of 3-bit-per-cell [flash memory,]" he said.

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